2002 Fairchild Semiconductor Corporation
RFD3055, RFD3055SM, RFP3055 Rev. B
RFD3055, RFD3055SM, RFP3055
12A, 60V, 0.150 Ohm, N-Channel Power
MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
Formerly developmental type TA49082.
Features
12A, 60V
r
DS(ON)
= 0.150
Temperature Compensating PSPICE
Model
Peak Current vs Pulse Width Curve
UIS Rating Curve
175
o
C Operating Temperature
Related Literature
- TB334 "Guidelines for Soldering Surface Mount
Components to PC Boards"
Symbol
Packaging
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFD3055
TO-251AA
FD3055
RFD3055SM
TO-252AA
FD3055
RFP3055
TO-220AB
FP3055
NOTE: When ordering, use the entire part number. Add the suffix 9A,
to obtain the TO-252AA variant in tape and reel, i.e. RFD3055SM9A.
G
D
S
JEDEC TO-251AA
JEDEC TO-252AA
JEDEC TO-220AB
SOURCE
DRAIN (FLANGE)
GATE
DRAIN
GATE
SOURCE
DRAIN (FLANGE)
GATE
DRAIN (FLANGE)
SOURCE
DRAIN
Data Sheet
January 2002
2002 Fairchild Semiconductor Corporation
RFD3055, RFD3055SM, RFP3055 Rev. B
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
RFD3055, RFD3055SM, RFP3055
UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DSS
60
V
Drain to Gate Voltage (R
GS
= 20K
) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
60
V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS
20
V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
12
A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Refer to Peak Current Curve
A
Single Pulse Avalanche Rating (Figures 14, 15) . . . . . . . . . . . . . . . . . . . . . . . . . . I
AS
Refer to UIS Curve
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
D
53
W
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.357
W/
o
C
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
J
, T
STG
-55 to 175
o
C
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
300
260
o
C
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 150
o
C.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
BV
DSS
I
D
= 250
A, V
GS
= 0V (Figure 11)
60
-
-
V
Gate Threshold Voltage
V
GS(TH)
V
GS
= V
DS
, I
D
= 250
A (Figure 10)
2
-
4
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
= Rated BV
DSS
, V
GS
= 0V
-
-
1
A
T
C
= 125
o
C, V
DS
= 0.8 x Rated BV
DSS
-
-
25
A
Gate to Source Leakage Current
I
GSS
V
GS
=
20V
-
-
100
nA
Drain to Source On Resistance
r
DS(ON)
I
D
= 12A, V
GS
= 10V (Figure 9) (Note 2)
-
-
0.150
Turn-On Time
t
ON
V
DD
= 30V, I
D
= 12A
R
L
= 2.5
, V
GS
= +10V
R
G
= 10
(Figure 13)
-
-
40
ns
Turn-On Delay Time
t
d(ON)
-
7
-
ns
Rise Time
t
r
-
21
-
ns
Turn-Off Delay Time
t
d(OFF)
-
16
-
ns
Fall Time
t
f
-
10
-
ns
Turn-Off Time
t
OFF
-
-
40
ns
Total Gate Charge
Q
g(TOT)
V
GS
= 0 to 20V
V
DD
= 48V,I
D
= 12A,
R
L
= 4
,
I
g(REF)
= 0.24mA
(Figure 13)
-
19
23
nC
Gate Charge at 10V
Q
g(10)
V
GS
= 0 to 10V
-
10
12
nC
Threshold Gate Charge
Q
g(TH)
V
GS
= 0 to 2V
-
0.6
0.8
nC
Input Capacitance
C
ISS
V
DS
= 25V, V
GS
= 0V,
f = 1MHz (Figure 12)
-
300
-
pF
Output Capacitance
C
OSS
-
100
-
pF
Reverse Transfer Capacitance
C
RSS
-
30
-
pF
Thermal Resistance Junction to Case
R
JC
-
-
2.8
o
C/W
Thermal Resistance Junction to Ambient
R
JA
TO-251 and TO-252
-
-
100
o
C/W
TO-220
-
-
62.5
o
C/W
Source to Drain Diode Specifications
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Source to Drain Diode Voltage
V
SD
I
SD
= 12A
-
-
1.5
V
Reverse Recovery Time
t
rr
I
SD
= 12A, dI
SD
/dt = 100A/
s
-
-
100
ns
NOTES:
2. Pulse Test: Pulse Width
300ms, Duty Cycle
2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current
Capability Curve (Figure 5).
RFD3055, RFD3055SM, RFP3055
2002 Fairchild Semiconductor Corporation
RFD3055, RFD3055SM, RFP3055 Rev. B
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. PEAK CURRENT CAPABILITY
1.2
1.0
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
175
PO
WER DISSIP
A
TION MUL
TIPLIER
T
C
, CASE TEMPERATURE (
o
C)
10
8
6
4
2
0
25
50
75
100
125
150
175
I
D
,
DRAIN CURRENT (A)
T
C
,
CASE TEMPERATURE (
o
C)
12
14
1
0.1
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t
1
, RECTANGULAR PULSE DURATION (s)
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
JC
x R
JC
+ T
C
0.01
0.02
0.05
0.1
0.2
0.5
THERMAL IMPED
ANCE
Z
JC,
NORMALIZED TRANSIENT
P
DM
t
1
t
2
SINGLE PULSE
50
10
1
0.1
1
10
100
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
1ms
100
s
10ms
DC
I
D
,
DRAIN CURRENT (A)
T
C
= 25
o
C
T
J
= MAX RATED
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
SINGLE PULSE
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
10
4
10
100
t, PULSE WIDTH (ms)
V
GS
= 20V
V
GS
= 10V
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
FOR TEMPERATURES ABOVE 25
o
C
DERATE PEAK CURRENT
CAPABILITY AS FOLLOWS:
I
I
25
*
175
T
C
150
---------------------
=
I
DM
,
PEAK CURRENT CAP
ABILITY (A)
200
T
C
= 25
o
C
RFD3055, RFD3055SM, RFP3055
2002 Fairchild Semiconductor Corporation
RFD3055, RFD3055SM, RFP3055 Rev. B
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. TRANSFER CHARACTERISTICS
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
TEMPERATURE
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs TEMPERATURE
Typical Performance Curves
Unless Otherwise Specified
(Continued)
STARTING T
J
= 150
o
C
STARTING T
J
= 25
o
C
50
10
1
0.001
0.01
0.1
1
t
AV,
TIME IN AVALANCHE (ms)
If R = 0
t
AV
= (L) (I
AS
) / (1.3 RATED BV
DSS
- V
DD
)
IF R
0
t
AV
= (L/R) ln [(I
AS
*R) / (1.3 RATED BV
DSS
- V
DD
) + 1]
I
AS
,
A
V
ALANCHE CURRENT (A)
24
18
12
6
0
0
1.5
3.0
4.5
6.0
7.5
I
D
,
DRAIN CURRENT (A)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 10V
V
GS
= 8V
V
GS
= 7V
V
GS
= 6V
V
GS
= 5V
V
GS
= 4.5V
PULSE DURATION = 80
s
DUTY CYCLE = 0.5% MAX
25
o
C
175
o
C
0
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
,
ON ST
A
TE DRAIN CURRENT (A)
24
18
12
6
0
PULSE DURATION = 80
s
-55
o
C
V
DS
= 15V
DUTY CYCLE = 0.5% MAX
2.5
2.0
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
200
NORMALIZED DRAIN
T
O
SOURCE
T
J
, JUNCTION TEMPERATURE (
o
C)
PULSE DURATION = 80
s
ON RESIST
ANCE
V
GS
= 10V, I
D
= 12A
DUTY CYCLE = 0.5% MAX
2.0
1.5
1.0
0.5
0
-80
-40
0
40
80
160
120
200
T
J
, JUNCTION TEMPERATURE (
o
C)
NORMALIZED GA
TE
THRESHOLD
V
O
L
T
A
G
E
V
GS
= V
DS
, I
D
= 250
A
2.0
1.5
1.0
0.5
0
-80
-40
0
40
80
120
160
200
NORMALIZED DRAIN
T
O
SOURCE
T
J
, JUNCTION TEMPERATURE (
o
C)
I
D
= 250
A
BREAKDO
WN V
O
L
T
A
G
E
RFD3055, RFD3055SM, RFP3055
2002 Fairchild Semiconductor Corporation
RFD3055, RFD3055SM, RFP3055 Rev. B
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified
(Continued)
C
ISS
C
OSS
C
RSS
400
600
200
0
0
5
10
15
20
25
C
,
CAP
A
CIT
ANCE (pF)
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
C
DS
+ C
GD
60
45
30
15
0
10
7.5
5.0
2.5
0
V
GS
,
GA
TE
T
O
SOURCE
V
O
L
T
A
GE (V)
20
I
G(REF)
I
G(ACT)
80
I
G(REF)
I
G(ACT)
t, TIME (
s)
V
DD
= BV
DSS
V
DD
= BV
DSS
R
L
= 5
I
G(REF)
= 0.24mA
V
GS
= 10V
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
V
DS
,
DRAIN
T
O
SOURCE
V
O
L
T
A
GE (V)
t
P
V
GS
0.01
L
I
AS
+
-
V
DS
V
DD
R
G
DUT
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
V
GS
R
L
R
G
DUT
+
-
V
DD
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
RFD3055, RFD3055SM, RFP3055
2002 Fairchild Semiconductor Corporation
RFD3055, RFD3055SM, RFP3055 Rev. B
FIGURE 18. GATE CHARGE TEST CIRCUIT
FIGURE 19. GATE CHARGE WAVEFORMS
Test Circuits and Waveforms
(Continued)
R
L
V
GS
+
-
V
DS
V
DD
DUT
I
g(REF)
V
DD
Q
g(TH)
V
GS
= 2V
Q
g(10)
V
GS
= 10V
Q
g(TOT)
V
GS
= 20V
V
DS
V
GS
I
g(REF)
0
0
RFD3055, RFD3055SM, RFP3055
2002 Fairchild Semiconductor Corporation
RFD3055, RFD3055SM, RFP3055 Rev. B
PSPICE Electrical Model
.SUBCKT RFP3055 2 1 3 ;
rev 10/26/93
CA 12 8 0.540e-9
CB 15 14 0.540e-9
CIN 6 8 0.300e-9
DBODY 7 5 DBDMOD
DBREAK 5 11 DBKMOD
DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 67.9
EDS 14 8 5 8 1
EGS 13 8 6 8 1
ESG 6 10 6 8 1
EVTO 20 6 18 8 1
IT 8 17 1
LDRAIN 2 5 1e-9
LGATE 1 9 4.61e-9
LSOURCE 3 7 4.61e-9
MOS1 16 6 8 8 MOSMOD M=0.99
MOS2 16 21 8 8 MOSMOD M=0.01
RBREAK 17 18 RBKMOD 1
RDRAIN 50 16 RDSMOD 1e-4
RGATE 9 20 7.23
RIN 6 8 1e9
RSCL1 5 51 RSLVCMOD 1e-6
RSCL2 5 50 1e3
RSOURCE 8 7 RDSMOD 108e-3
RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD
S1B 13 12 13 8 S1BMOD
S2A 6 15 14 13 S2AMOD
S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1
VTO 21 6 0.5
ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/30,6.5))}
.MODEL DBDMOD D (IS=4.33e-14 RS=2.78e-2 TRS1=1.10e-3 TRS2=5.19e-6 CJO=3.94e-10 TT=7.63e-8)
.MODEL DBKMOD D (RS=0.676 TRS1=1.94e-3 TRS2=-1.09e-6)
.MODEL DPLCAPMOD D (CJO=0.238e-9 IS=1e-30 N=10)
.MODEL MOSMOD NMOS (VTO=4.078 KP=12 IS=1e-30 N=10 TOX=1 L=1u W=1u)
.MODEL RBKMOD RES (TC1=1.06e-3 TC2=-1.92e-6)
.MODEL RDSMOD RES (TC1=5.03e-3 TC2=1.53e-5)
.MODEL RSLVCMOD RES (TC1=2.2e-3 TC2=-5e-6)
.MODEL RVTOMOD RES (TC1=-5.02e-3 TC2=-9.16e-6)
.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.5 VOFF=-3.5)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-6.5)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.50 VOFF=2.50)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.50 VOFF=-2.50)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-Circuit for the Power MOSFet Featuring Global Temperature
Options; authored by William J. Hepp and C. Frank Wheatley.
1
GATE
LGATE
RGATE
EVTO
18
8
9
+
12
13
8
14
13
13
15
S1A
S1B
S2A
S2B
CA
CB
EGS
EDS
R
IN
C
IN
MOS1
MOS2
RDRAIN
DBREAK
EBREAK
DBODY
LDRAIN
DRAIN
RSOURCE
LSOURCE
SOURCE
RBREAK
RVTO
VBAT
IT
VTO
ESG
DPLCAP
ESCL
RSCL1
RSCL2
6
6
8
10
5
51
50
5
51
16
21
11
17
18
8
14
5
8
6
8
7
3
17
18
19
2
+
+
+
+
+
+
+
RFD3055, RFD3055SM, RFP3055
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
OPTOLOGICTM
OPTOPLANARTM
PACMANTM
POPTM
Power247TM
PowerTrench
QFETTM
QSTM
QT OptoelectronicsTM
Quiet SeriesTM
SILENT SWITCHER
FAST
FASTrTM
FRFETTM
GlobalOptoisolatorTM
GTOTM
HiSeCTM
ISOPLANARTM
LittleFETTM
MicroFETTM
MicroPakTM
MICROWIRETM
Rev. H4
ACExTM
BottomlessTM
CoolFETTM
CROSSVOLTTM
DenseTrenchTM
DOMETM
EcoSPARKTM
E
2
CMOS
TM
EnSigna
TM
FACTTM
FACT Quiet SeriesTM
SMART STARTTM
STAR*POWERTM
StealthTM
SuperSOTTM-3
SuperSOTTM-6
SuperSOTTM-8
SyncFETTM
TinyLogicTM
TruTranslationTM
UHCTM
UltraFET
STAR*POWER is used under license
VCXTM
PDF 
ZIP